What is the background and formation of company?
Xilinx was founded in 1984 as “The Programmable Logic Company.” Inventors of the Field Programmable Gate Array and pioneers of the fabless semiconductor business model, Xilinx has had dozens of industry “firsts” in both technology and business areas. Thirty-five years ago, Xilinx sought to democratise custom logic design by enabling a broader customer set, one that could not afford the NREs of pricy custom ASICs. With FPGAs now clearly in the mainstream, Xilinx has focused on building a better SoC-based embedded platform by combining industry standard Arm processors with customisable programmable logic fabric in a single small footprint device. Imagine a common device that can support MIPI, LVDS, and SLVS-EC from a sub-1MP rolling shutter sensor to the largest global shutter sensor with real-time image processing, AI, and a wide array of communications standards like GigEVision, USB, CoaxExpress, TSN, and beyond to the factory network. This highly-flexible programmable silicon, enabled by a suite of advanced software and tools, drives rapid innovation across a wide span of industries and technologies including factories, hospitals, smart cities and the cloud. Xilinx powers scalable Industrial and Healthcare IoT platforms enabling intelligent and adaptive assets.
What is the new/latest innovative product launch?
Our latest product line, Versal, takes a quantum leap on the SoC concept to introduce the world’s first ACAP, Adaptive Compute Acceleration Platform. Versal is a heterogeneous compute platform that combines Scalar Engines, Adaptable Engines, and Intelligent Engines to achieve dramatic performance improvements of up to 20X over today’s fastest FPGA implementations and over 100X over today’s fastest CPU implementations.
How will this impact on the market?
Versal is Xilinx’s first product line that is designed with software engineers and data scientists in mind. While traditional hardware/firmware engineers won’t be disappointed by the amount of innovation, Versal simplifies development of programmable hardware accelerators that augment the Arm A72 embedded processors. In particular, a network-on-chip architecture and an ample quantity of AI engines take embedded vision applications to the next level. It will enable all processing on camera without the requirement for PC-based capture and processing.
Why are FPGAs so prevalent in machine vision applications?
Most machine vision/factory automation cameras beyond the entry level models use FPGA technology with the overwhelming majority of them using Xilinx. There is really no technology available that is better suited to capture image data from a high-resolution sensor and process it in real-time and ship it out over an industry standard or proprietary communications protocol without buffering or complex memory operations.
What technologies do you see shaping the future of Machine Vision cameras?
Machine learning using neural networks offers the most potential for productivity gains in defect detection/sorting applications as well as a host of classification applications. Early adopters of this technology are already starting to realise the benefits today. Adoption of this technology is driving the transition from traditional camera architectures to smart cameras and is expected to accelerate in 2020.
What technologies do you see shaping the future of Machine Vision Frame Grabbers?
Not every application can move to smart cameras because of restrictions with existing infrastructures, so the machine learning is done on the host PC. Xilinx offers a line of Accelerator cards called Alveo. In particular, the Alveo U50 is an ideal entry level choice as smart frame grabber for high-performance machine vision, able to analyse multiple high-resolution, high-frame-rate camera channels to accelerate industrial automated inspection and enable new insights into manufacturing processes. The Alveo U50 can extract intelligence from up to eight 10GigE (10 Gb Ethernet) high-speed, low-latency camera streams, greatly outperforming comparable single-input CPU/GPU-based frame grabbers. Alternatively, it can handle up to 96 GigE camera streams compared to a typical conventional 4-input frame grabber. The Alveo U50 simplifies system architecture compared to alternatives such as multi-x86 industrial PCs. Performance benchmarks indicate 8x/2.5x advantage over CPU or P4 GPU respectively. Power efficiency of 42 images/Sec/W for GoogleNetv1(int8) DNN in low-latency mode compares with only 28 images/Sec/W for P4 GPU.
What are the plans for 2020?
Xilinx 2020 plans for machine vision customers means the continued roll-out of the Versal family along with some new radical new innovations reducing the size, weight and power of cameras that we’ll share more details on in early 2020. We are also making some big advancements around the design tool flows, opening up our devices to more abstract programming mechanisms beyond the traditional programming languages to make this incredible technology accessible to a broader set of customers. We will talk about all these topics above at SPS IPC Drives, in Nuremberg on 26-28 November, 2019, Xilinx stand# H4-558.
Name of Company: Xilinx
The interviewee: Chetan Khona (Director, Industrial, Vision, Healthcare & Sciences)
Contact details: email@example.com